Work Location：Qingdao,China

Salary: 20-35kRMB / month

Responsibilities:

1. Design the DFT scheme reasonably according to the requirements;

2. Use the Mentor/Synopsys tool to insert the DFT circuit (JTAG/BSCAN/SCAN/MBIST/ LBIST, etc.);

3. Conduct relevant verification of DFT circuit (ATPG/ BIST simulation /IP verification /Formality);

4. DFT circuit timing analysis;

5. Generate the test vector and assist Test Engineer in the failure analysis.

Requirements:

1.Proficient in Mentor/Synopsys and scripting languages such as tcl/Python;

2.Master the knowledge of BSCAN/SCAN/MBIST/LBIST related DFT circuit, master the timing analysis method;

3.Experience in ATPG and simulation verification, able to analyze problems independently;

4.Understand IP (PLL / Sensor / PCIE / HBM / FUSE /...) Basic functions and test methods;

5.Understand the test related knowledge and analysis methods.