Work Location: Qingdao, China
Annual salary: 200,000-400,000 RMB/year
Responsibility:
1. Responsible for RTL logic design and debugging of various FPGA interfaces;
2. Responsible for the evaluation and selection of FPGA devices;
3. Responsible for new technology research and evaluation;
4. Provide FPGA technical support to relevant departments and customers.
Job Description:
1. Bachelor degree or above, major in electronics, microelectronics or related;
2. Solid theoretical knowledge of digital circuit, familiar with digital circuit design;
3. Familiar with the use of signal source, oscilloscope, logic analyzer and other instruments;
4. At least 3 years FPGA engineer experience, able to independently complete related FPGA circuit design;
5. Have a good sense of teamwork, good organizational communication and coordination ability;
6. 4/5G communication, satellite communication, AD hoc communication, and special communication terminal FPGA R&D experience is preferred
Contact Us
ADDRESS:Ningxia Road#288, Qingdao Software Park building 1 Room 2602, Shinan District, Qingdao, China Postal code 26607
TTEL:+86 18561762383
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