Work Location: Xi 'an, China

Salary: RMB 20,000-40,000 / month *13 months

Responsibility

1. Participate in the discussion of algorithm verification system design scheme.

2. Participate in the fixed-point review and optimization of modules.

3. Develop and verify related subsystems or submodules of FPGA/IC taping-out.

4. Board level debugging and testing of FPGA/IC taping-out.

5. Participate in the simulation and verification of FPGA/IC taping-out and the performance and function test of the system.

6. Preparation of relevant design documents.

Requirements:

1. Master degree or above in electronic information, signal processing, communication engineering

2.Proficient in English

3. At least 3 years working experience in FPGA development.

4. Good communication background, familiar with common coding principles, digital modulation and demodulation systems such as OFDM, and digital signal fixed-point processing methods.

5. Familiar with MATLAB simulation platform, proficient in algorithm module development and simulation verification process, familiar with timing constraints and optimization.

6. Proficient in the general methods of communication system debugging, and understand the design simulation and verification process of FPGA/IC products.